求EDA用VHDL语言的程序设计，急急急！给高分！（要求完成一个具有异步复位和同步使能功能的10进制计数器）

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_unsigned.all;

entity shicount is

 port(clk,reset,enable: in std_logic;

         a,b,c,d,e,f,g: out std_logic;

         tp  :  out std_logic_vector(0 to 3);

         xian: out std_logic_vector(0 to 6);

         count  :out std_logic);

end shicount;

architecture xu of shicount is

     signal temp   :std_logic_vector(0 to 3);

     signal xianshi:std_logic_vector(0 to 6);

begin

process(clk,reset,enable)

begin

   if (reset='1')then temp<="0000";

    elsif (enable='1') then

      if (clk' event and clk='1') 

          then  if (temp<="1000") then temp<=temp+1;

               else temp<="0000";

          end if;

      end if;

   end if;

end process;

 process(temp)

    begin

         case temp is

           when "0000"=> xianshi<="0000001";count<='0'; 

           when "0001"=> xianshi<="0110000";count<='0';

           when "0010"=> xianshi<="1101101";count<='0';

           when "0011"=> xianshi<="1111001";count<='0';

           when "0100"=> xianshi<="0110011";count<='0';

           when "0101"=> xianshi<="1011011";count<='0';

           when "0110"=> xianshi<="0011111";count<='0';

           when "0111"=> xianshi<="1110000";count<='0';

           when "1000"=> xianshi<="1111111";count<='0';

           when "1001"=> xianshi<="1110011";count<='1';

           when others=> xianshi<="0000000";count<='0';

         end case;

    end process;

      a<=xianshi(6);  b<=xianshi(5);  c<=xianshi(4); d<=xianshi(3);  

      e<=xianshi(2);f<=xianshi(1);  g<=xianshi(0);  tp<=temp;

      xian<=xianshi;

 end xu;